[llvm-dev] Custom calling convention & ARM target

[Tim Northover via llvm-dev]

On Tue, 16 Jul 2019 at 18:54, Alexander Mitin via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> For ARM we are having troubles with the LR register.
> The problem is that when there is a return from a function using our CC
> the existing LLVM machinery emits 'mov pc, lr' instruction which looks fine.

It's actually pretty suspicious. You'd only realistically use that
sequence on a very, very old CPU which puts you deep into barely
tested territory on LLVM. I'd look into setting your triple and target
to something more recent.

Triple should probably be "arm-linux-gnueabi" at least, or maybe
"arm-none-eabi" if you're targeting bare metal; the CPU would probably
be OK at default for either of those, but otherwise would normally be
something implementing at least ARMv6 (arm1176jzf-s in RPi), probably
ARMv7 (something starting with "cortex").

> So the question is how to preserve LR register in the best way? My
> current idea is to write a MachineFunctionPass which would add LR
> register spill instruction to stack or some other memory and add LR
> reload instruction on return.

The backend should preserve LR through to the return instruction
automatically since it's a fundamental part of any calling convention
on ARM. I had a quick look and couldn't even see a way to break it
while tweaking purely calling convention knobs, so I suspect your CPU
issue above is to blame.

If fixing that doesn't resolve the issue, could you tell us which bits
of the calling convention you have customized for ARM? It'd hopefully
help to narrow down where things might be going wrong, because I'm
pretty perplexed.

Cheers.

Tim.