[llvm-dev] What can cause llc to throw an error for instruction numbering?

[Tim Northover via llvm-dev]

Hi Kaarthik,

On Mon, 8 Jul 2019 at 18:18, Kaarthik Alagapan via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> llc: error: llc: check.ll:12:3: error: instruction expected to be numbered '%5'
>
>   %4 = alloca i32, align 4
>
>
> What changes/modification would cause this error to show up? I was thinking that SelectionDAGBuilder would cause this as it parses IR to an optimized version but not sure.

I think only the IR parser (lib/AsmParser/LLParser.cpp) produces that
error, which is well before anything in SelectionDAG runs.

Did you maybe intend to create an instruction that doesn't produce a
value (like "store" for example) but start off by copying one that did
produce a value? In that case, if your IR was really

    ...
    %3 = ...
    my_shiny_inst i32 %a, %b
    %4 = alloca i32
    ...

then during parsing LLVM will have decided that my_shiny_inst really
produced %4 (it wouldn't complain about "%4 =" being missing at that
point), but when the next instruction claimed to be %4 it would
produce the error you're describing.

Obviously the same situation could occur if your instruction really
does produce a value but you either intentionally or accidentally
omitted the "%4 =" in your test-case IR.

Cheers.

Tim.