[llvm-dev] [hexagon][PowerPC] code regression (sub-optimal code) on LLVM 9 when generating hardware loops, and the "llvm.uadd" intrinsic.

Joan Lluch via llvm-dev llvm-dev at lists.llvm.org
Tue Jul 2 06:50:07 PDT 2019


Hi Krzysztof,

Thank you very much for your quick reaction. This is very much appreciated.

I have pulled your code from the main LLVM repo and found that it works fine!. However, after looking at it I have a question about it. My understanding is that your code only replaces uaddo, usubo with ‘1’ as the second operand. This certainly solves the hardware loop problem and I assume it’s enough, as there’s no possible loops with scalable increments?

I also want to mention that based on the reply I received from Sanjay, I also tried to override ‘shouldFormOverflowOp’ to always return false. This also solves the issue, but of course it prevents the ‘.with.overflow’ intrinsics to be generated at all. My understanding is that this fully mimics LLVM 7.0 behaviour, but I do not have the required knowledge on Hexagon to give an opinion about whether this is useful. I’m just posting this as a matter of information

Thanks again!

John


> On 1 Jul 2019, at 17:51, Krzysztof Parzyszek <kparzysz at quicinc.com <mailto:kparzysz at quicinc.com>> wrote:
> 
> The Hexagon part is fixed in r364790.
>  
> -- 
> Krzysztof Parzyszek  kparzysz at quicinc.com <mailto:kparzysz at quicinc.com>   LLVM compiler development
>  

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