[llvm-dev] [RFC] arm64_32: upstreaming ILP32 support for AArch64

Matt Arsenault via llvm-dev llvm-dev at lists.llvm.org
Fri Feb 1 12:04:39 PST 2019

> On Feb 1, 2019, at 3:01 PM, Tim Northover <t.p.northover at gmail.com> wrote:
> On Fri, 1 Feb 2019 at 19:35, Matt Arsenault <arsenm2 at gmail.com> wrote:
>> This is basically what we do for one address space on AMDGPU
> Don't suppose you could tell me which it is? No worries if you don't
> remember, but it might save me a few minutes in unfamiliar code if you
> do.
> Cheers.
> Tim.

The current implementation is not what it should be, since it’s currently done in the selector (see Expand32BitAddress) for CONSTANT_ADDRESS_32BIT, which just needs a zext to CONSTANT_ADDRESS. I’ve been meaning to move this into the lowering for the load


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