[llvm-dev] [SVE][AArch64] Codegen for a scalable vector splat

Renato Golin via llvm-dev llvm-dev at lists.llvm.org
Thu Aug 29 06:00:37 PDT 2019

On Thu, 29 Aug 2019 at 13:27, Graham Hunter via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> 1) Add a new SPLAT_VECTOR ISD node. This was part of our overall RFC from 2016 and is the solution that we're currently using downstream. It just accepts a single scalar value. This has worked well with just the SVE codegen using it, but I don't know if we would run into problems if we try to make this the canonical splat form for SDAG.
> 2) Extend BUILD_VECTOR to accept an initial boolean indicating whether it is a splat, and if true the first element can be assumed to be the same as all others. The splat form would be the only valid use of BUILD_VECTOR for scalable vector types. For fixed length vectors we could either change existing checks for splats to only look at the flag and would only need one extra argument for the splat value, or use the flag as a shortcut and fall back to checking all the elements if there's the possibility of a fold generating a splat and it not being recognised.

Hi Graham,

I'm not a big fan of boolean flags on related concepts because the API
becomes brittle. In this case, BUILD_VECTOR-splat would need an assert
to make sure there's only one element.

Can we reuse the SPLAT_VECTOR node for predicated fixed width vectors?
This would simplify a bit the tail of the loop in AVX, for example,
but would also make sure we treat similar patterns in the same way,
and add to the list of reasons why to add a new node.


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