[llvm-dev] [RFC][RISCV] Selection of complex codegen patterns into RISCV bit manipulation instructions

paolo via llvm-dev llvm-dev at lists.llvm.org
Wed Aug 14 05:12:58 PDT 2019

Hi all,

I'm currently working on the implementation for LLVM of the RISCV Bit
Manipulation ISA extension described by Clifford Wolf in the following


and the following document:


The aim is to provide the intrinsic functions to the user in order to
implement code that is more optimal for bit manipulations on RISCV
targets, but also to provide automatic optimization by lowering simple
code patterns into optimized bit manipulation assembly,

    %neg = xor i32 %1, -1                    ----->      andn t0, t0, t1
    %and = and i32 %0, %neg

just in case the user wants such optimization but is not aware of all
the bits that can be optimized.

I'm dealing with the fact that it is pretty hard to select some patterns
of DAG nodes in order to replace them with an optimal machine equivalent
machine instruction.

Take for intsance the count leading zeros operation:

    uint32_t clz (uint32_t x)


        for (int count = 0; count < 32; count++ ) {

            if ((x << count) < 0)

                return count;


        return 32;


It needs a loop to be performed and that makes it difficult to be
lowered because it goes through several basic blocks, and different
optimizations can easily compromise the pattern recognition.

What I'm wondering is, is there already any place in LLVM where complex
patterns like this are already lowered into single instructions? (e.g.:
clz, that is used quite often). Maybe at a higher level?

Another point of view that I've been suggested and that I'd like to
discuss is: does it make sense to implement such lowering for operations
that normally a user wouldn't implement from scratch when an intrinsic
function is already available for that?

Many thanks.

Paolo Savini

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