[llvm-dev] [LLVM] (RFC) Addition/Support of new Vectorization Pragmas in LLVM

[Jeff Hammond via llvm-dev]

On Fri, Aug 9, 2019 at 11:51 AM David Greene via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> HAPPY Mahto via llvm-dev <llvm-dev at lists.llvm.org> writes:
>
> > 2 Nontemporal
>
> Is this a hint or a command?  If it's a command then this would
> implicitly specify the data is aligned on some targets (e.g. Intel X86).
> I'm not sure we want to make that implicit assumption as it is very easy
> for the programmer to get this wrong.
>

I think it has to be a hint.  If it is a command, what is it's meaning on
non-x86 processors where write-through and write-back are controlled in
different ways (or are just uncontrollable)?

For example, some PPC set cache write back/through at the page level (
https://www.nxp.com/docs/en/data-sheet/MPC603.pdf).  Would the command
implementation have to try to set the page properties to do as the user
directed?

There are also cases where the compiler may know that the user is often
wrong about the utility of non-temporal memory access and ignoring it is an
effective optimization.  This is potentially relevant to profile-guided
optimization.

Jeff

-- 
Jeff Hammond
jeff.science at gmail.com
http://jeffhammond.github.io/
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