[llvm-dev] XOR A, A treatment

Tim Northover via llvm-dev llvm-dev at lists.llvm.org
Thu Sep 27 04:07:04 PDT 2018


On Thu, 27 Sep 2018 at 11:50, James Courtier-Dutton via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> I am wondering about what suitable assembler level instruction substations are.
> For example:
> Result = XOR Reg1, Reg1;
>
> Result is always zero, with the flags cleared.
> Could I substitute this for:
> Result = XOR Constant0, Constant0;

Architecturally there may be an effect on memory ordering: machines
like ARM guarantee address dependency so if Result was later used as
an offset in a load or store, the CPU would guarantee that saw data
newer than when (anything feeding into) Reg1 was loaded.

Some special case for sequences like that XOR would be needed to
support http://open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0750r1.html,
though I strongly suspect it would involve pseudo-instructions rather
than a conventional xor, and even that's probably not enough.

But that's all theoretical future work. I believe the transformation
is valid going by what you've described -- neither register outputs
nor memory are changed by the substitution.

Cheers.

Tim.


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