[llvm-dev] [MC Layer] parsing/disassembling implicit operands

[Davis, Alan via llvm-dev]

I'm working on the assembler and disassembler for a target that has compact-form instructions with implicit register operands. Even though the operands are implicit they appear in the assembly syntax. As a contrived example consider an instruction that adds R0 to another register. The syntax is "ADD R0,<dst>" even though R0 is not actually encoded.

The dilemma is how to treat that implied operand in the .td. Option 1 is to make it an implicit operand (omit from ins/outs and declare it as a Use), and hard-code the register name in the AsmString, as AsmString = "ADD\tR0,$dst". If I do this the assembly parser does not know how to handle "R0" in the input. In this case it wants the MCParsedAsmOperand to be a token, but "R0" needs to be a register in other contexts.

So Option 2 is to make it an explicit register operand, with a regclass containing only R0, then declare it as a "normal" register operand in the ins list: InOperandList = (R0Class:$src); and AsmString = "ADD\t$src,$dst". This works for the assembly parser, but breaks the disassembler. The disassembler will only instantiate operands that appear in the encoding field (Inst) in the instruction, so in this case $src is completely missing from the MCInst built by the disassembler.

Before I explore some hacky way around all this, I thought I'd see if anyone has suggestions.

-Alan
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