[llvm-dev] How to add a barrier pseudo instruction?

[Tim Northover via llvm-dev]

Hi Son,

On Tue, 18 Sep 2018 at 21:01, Son Tuan VU <sontuan.vu119 at gmail.com> wrote:
> So IIUC, optimization passes in opt do not reorder IR instructions, only passes in llc that move MIR instructions around. Is it correct?

I don't think active scheduling (i.e. trying to optimize order for
speed) goes on in IR, but incidental movements will definitely happen.

> On the back-end (llc) side, hasSideEffects might prevent some reordering. But I just learn about TargetInstrInfo::isSchedulingBoundary. Can you tell me what are the differences between the two please?

Not in detail, I'm afraid. I'd never heard of isSchedulingBoundary
before. It looks like it might improve matters if you really want to
enforce no movement, but it wasn't designed for the purpose so I
couldn't guarantee it.

Cheers.

Tim.