[llvm-dev] Question about MachineCSE optimization

[Yuchao (Michael) via llvm-dev]

As far as I know, dead register is not only means none would read  it , it may means register is clobbered.

http://lists.llvm.org/pipermail/llvm-dev/2018-February/120994.html

From: Matthias Braun [mailto:matze at braunis.de]
Sent: Tuesday, October 23, 2018 2:04 AM
To: Yuchao (Michael) <michael.yuchao at huawei.com>
Cc: llvm-dev at lists.llvm.org; sunqiang (I) <sunqiang13 at huawei.com>
Subject: Re: [llvm-dev] Question about MachineCSE optimization

Yes
OP_X ..., implicit-def dead %X
... potentially more defs/uses of %X
OP_X ..., implicit-def dead %X

is good to merge. Also note that:

%X = DEF
OP_X ..., implicit-def dead %X
use %X

is not valid! (The def overrides the register value but the "dead" flag promises noone will read it, even though in this case another use comes below).

- Matthias


On Oct 22, 2018, at 4:59 AM, Yuchao (Michael) <michael.yuchao at huawei.com<mailto:michael.yuchao at huawei.com>> wrote:

Hi mbraun

Thanks for your information.

What about following situation:
3)
OP_X …, implicit-def dead %X
with
OP_X …, implicit-def dead %X

Between two instructions, there may be another instruction(not OP_X) which also def %X,
Is it  correct to do CSE in this situation?

Best wishes
Michael

From: mbraun at apple.com<mailto:mbraun at apple.com> [mailto:mbraun at apple.com]
Sent: Monday, October 22, 2018 5:51 AM
To: Matthias Braun <mbraun at apple.com<mailto:mbraun at apple.com>>
Cc: Yuchao (Michael) <michael.yuchao at huawei.com<mailto:michael.yuchao at huawei.com>>; llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>; sunqiang (I) <sunqiang13 at huawei.com<mailto:sunqiang13 at huawei.com>>
Subject: Re: [llvm-dev] Question about MachineCSE optimization





On Oct 21, 2018, at 2:48 PM, mbraun via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote:

As far as I understand it (though I didn’t write the code so I may be missing something) this is about making sure liveness flags (kill, dead) are updated correctly when merging instruction. The situations to consider are probably:

1)
OP_X …, implicit-def %X
with
OP_X …, implicit-def dead %X

The merged instruction probably should not have a dead flag set. The 2nd if appears to be about this situation:


2)
OP_X …, implicit-def dead %X
Use killed %X
…
OP_X …, implicit-def %X    ; this gets merged with the previous OP_X
Use %X
This example should of course read:

OP_X …, implicit-def %X
Use killed %X
…
OP_X …, implicit-def %X    ; this gets merged with the previous OP_X
Use %X

Once we merge the 2nd OP_X with the first one, we have to drop the `killed` flags on all users of %X between the first OP_X and the position where we had the 2nd OP_X before it was merged.




Once we merge the 2nd OP_X with the first one, we have to drop the `killed` flags on the %X users.



Though admittedly I am at a loss right now why this is only performed for implicit operands and not for all operands…

- Matthias



On Oct 20, 2018, at 1:38 AM, Yuchao (Michael) via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote:

Hi

I am trying to fix a bug in MachineCSE and have one question about following code:

*********************************************
// Go through implicit defs of CSMI and MI, if a def is not dead at MI,
// we should make sure it is not dead at CSMI.
if (MO.isImplicit() && !MO.isDead() && CSMI->getOperand(i).isDead())
  ImplicitDefsToUpdate.push_back(i);

// Keep track of implicit defs of CSMI and MI, to clear possibly
// made-redundant kill flags.
if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg)
  ImplicitDefs.push_back(OldReg);

if (OldReg == NewReg) {
  --NumDefs;
  continue;
}
**********************************************

From Above source code, it seems that CSE does not handle instruction which
have one operand that is ‘implicit+isDead+isDef’.

Base on my understanding, implicit dead register is mean clobbered, so it is not safe to
do CSE. Is this right?

Best wishes
Michael

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