[llvm-dev] an assemble conherence problem

[hanshiyin via llvm-dev]

Hi:
	We found an assemble conherence problem caused by the SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *, const SDValue *, unsigned).
	It compare (struct UseMemo overrides operator compare) and sort SDValue’s user by user’s pointer (which is unstable).
	Lib/CodeGen/SelectionDAG/SelectionDAG.cpp 
	namespace {
	  /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
	  /// to record information about a use.
	  struct UseMemo {
	    SDNode *User;
	    unsigned Index;
	    SDUse *Use;
	  };

	  /// operator< - Sort Memos by User.
	  bool operator<(const UseMemo &L, const UseMemo &R) {
	    return (intptr_t)L.User < (intptr_t)R.User;
	  }
	}

	On our case,  When in instruction selection phase, the replaced SDValue is a load instruction and the user is two CopyToReg instruction.
	The sort() change the order of the uselist (which is different between 64bit gcc and 32bit vs compiler), influence instruction emit. The load instruction choose the virtual register from the first found CopyToReg instruction and make result different.
	Do your have any idea on how to fix this?
Best regards,
Han Shiyin