[llvm-dev] How to define an instruction

[Tianhao Shen via llvm-dev]

Hi,
I have some questions about instructions again.
I have add a DAG successfully,I think.Because what I do can be compiled to LLVM IR and binary file.
I guess, the schedule of an instruction tells the machine how to do . I don't konw if it's right.
For example,there is the definition of IMUL32rr in X86InstrArithmetic.td. "WriteIMul32Reg" is the most important and the defines the multiplication.
def IMUL32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1,GR32:$src2),"imul{l}\t{$src2, $dst|$dst, $src2}",   [(set GR32:$dst, EFLAGS, (X86smul_flag GR32:$src1, GR32:$src2))]>,Sched<[WriteIMul32Reg]>, TB, OpSize32;
And in X86ScheduleXXX.td ,there is definition of Ports and so on.


My questions are here,as following:
1.whether the schedule of an instruction defines the machine how to do.
2.Why is there no "add" or "sub" instructions("ALU insturctions") in X86InstrArithmetic.td? How "ALU insturctions" define?
3. I use the WriteIMul32Reg in my insturction.In my imagination, my instruction should also be multiplication.But it doesn't work.(my instruction can be compiled but can't run) .why  can't it run? I think, it's no different with "IMUL32rr ".
Here is the result :
test.c shows as following:(the main content )
int a,b;
a=1;b=1;
a=a=__builtin_x86_max_qb (a,b); (the main content  )
test.ll shows as following:
  %0 = load i32, i32* %a, align 4
  %1 = load i32, i32* %b, align 4
  %2 = call i32 @llvm.x86.max.qb(i32 %1, i32 %2)
  store i32 %2, i32* %a, align 4  
when lli test.ll ,it goes wrong.


Here is my all code:
1. In llvm/include/llvm/IR/IntrinsicsX86.td : 
let TargetPrefix = "x86" in { 
def int_x86_max_qb: GCCBuiltin<"__builtin_x86_max_qb">,
  Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [Commutative]>;
}
2. In llvm//tools/clang/include/clang/Basic/BuiltinsX86.def:  
BUILTIN(__builtin_x86_max_qb, "iii", "") 
3.In llvm/lib/Target/X86/X86ISelLowering.h:
max_qb,
4.In llvm/lib/Target/X86/X86IntrinsicsInfo.h:(IntrinsicsWithoutChain)
X86_INTRINSIC_DATA(max_qb, INTR_TYPE_2OP, X86ISD::max_qb, 0),
5.In llvm/lib/Target/X86/X86InstrInfo.td:
def X86max_qb : SDNode<"X86ISD::max_qb", SDTBinaryArithWithFlags,
                          [SDNPCommutative]>;
6.In X86InstrArithmetic.td: 
let Defs = [EFLAGS] in {
    let Constraints = "$src1 = $dst" in {
        let isCommutable = 1 in {
                def max_qb : I<0xF0,MRMSrcReg, (outs  GR32:$dst), (ins GR32:$src1,GR32:$src2), "max_qb{w}\t {$dst, $src1,$src2|$dst, $src2,$src1}", [(set GR32:$dst,EFLAGS,(X86max_qb GR32:$src1, GR32:$src2))]>, Sched<[WriteIMul32Reg]>,OpSize32 ;
        }
    }
}


I know,this email is too long to read easily. But I hope you can read over and help me. 
Thanks sincerely,
Tianhao Shen





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