[llvm-dev] ARM64, dropping ADRP instructions, and ld.lld

[Bruce Hoult via llvm-dev]

Are you sure about that?

In the documentation for the ADRL pseudo it says:

"ADRL assembles to two instructions, an ADRP followed by ADD."

"ADRL produces position-independent code, because the address is calculated
relative to PC."

>From this, I'd expect ADRP to simply do Xd <- PC + n*4096, where n is a 20
bit number, just like AUIPC in RISC-V (also a 20 literal multiplied by
4096) or AUIPC in MIPS (16 bits multiplied by 65636 there).

In all cases, if you then do an add immediate with a 12 bit signed literal
(16 bit for MIPS) then you've got a relative offset from the current PC<
accurate to the byte, anywhere in a +/- 2 GB range.

The actual alignment of the PC is irrelevant. It's not like the ADRP or
AUIPC sets the low 12 bits to zero or something. It leaves them alone (as
it finds them in the PC).

On Tue, May 22, 2018 at 12:31 AM, Eric Gorr via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> Hello,
>
> I am working in an embedded environment with somewhat restrictive memory
> requirements where the page alignment requirements of an ADRP instruction
> cannot be guaranteed.
>
> With the ld program inside of the Xcode, there is a -preload flag which
> causes ADRP instructions to be dropped, and generates code that is 100%
> position independent.
>
> As near as I can determine, ld.lld does not have this same feature. I am
> wondering if I am missing something, if such a feature is being planned, or
> if there is an alternative I have not considered yet.
>
> Regards,
> Eric
>
>
>
>
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180522/f93f80d3/attachment.html>