[llvm-dev] [RFC] MC support for variant scheduling classes.

Andrew Trick via llvm-dev llvm-dev at lists.llvm.org
Thu May 10 13:58:19 PDT 2018

> On May 10, 2018, at 8:58 AM, Andrea Di Biagio <andrea.dibiagio at gmail.com> wrote:
> Hi all,
> The goal of this RFC is to make information related to variant scheduling
> classes accessible at MC level. This would help tools like llvm-mca
> understand/resolve variant scheduling classes.
> To achieve this goal, I plan to introduce a new class of scheduling predicates
> named MCSchedPredicate. An MCSchedPredicate allows the definition of boolean
> expressions with a well-known semantic, that can be used to generate code for
> both MachineInstr and MCInst.
> The new predicates are designed to be completely optional. Scheduling models
> can use a combination of SchedPredicate and MCSchedPredicate to describe
> variant reads and writes. Old scheduling predicate definitions would still be
> valid. New MCSchedPredicates would behave like normal scheduling predicates.

> <snip>

> What to do next
> ---------------
> I have a series of three patches ready to be sent upstream for review.
> The first patch is mostly a no functional change. It introduces the new
> scheduling predicate class in tablegen, and it teaches the
> InstructionInfoEmitter and the SubtargetEmitter how to expand MCSchedPredicate
> definitions.
> The first patch is up for review here: https:://reviews.llvm.org/D46695 <http://reviews.llvm.org/D46695>.
> The second patch would teach the SubtargetEmitter how to generate method
> resolveVariantSchedClass().
> The last patch of the sequence will teach llvm-mca how to use method
> `resolveVariantSchedClass()` to resolve variant classes. llvm-mca will generate an error if the variant scheduling class cannot be resolved.
> Review https://reviews.llvm.org/D46697 <https://reviews.llvm.org/D46697> is the union of patch1 and patch2 only.
> It is not meant to be reviewed at this stage, since it contains the code
> changes related to patch1.
> The third patch is available here: https://reviews.llvm.org/D46698 <https://reviews.llvm.org/D46698>.
> D46698 requires patch1 and patch2.
> Bonus (optional) patches:
>  1) [X86] Teach scheduling models how to recognize zero-idioms.
>     This would make easier to review the llvm-mca change.
>  2) [X86] Add variant scheduling classes for LEA instructions.
>  3) [AArch64] Rewrite the predicates mentioned by this RFC.
> People that are interested in seeing how to implement "optional" patch 3 can
> have a look at the review here: https://reviews.llvm.org/D46701 <https://reviews.llvm.org/D46701>
> Please let me know what you think.
> Thanks,
> Andrea

Fantastic writeup! It’s great to see so much progress on fundamental infrastructure.

My time for LLVM code review is extremely limited. Can someone work with Andrea to get these patches in?


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