[llvm-dev] How to constraint instructions reordering from patterns?

[Dominique Torette via llvm-dev]

Hi,

Is there a kind of scope mechanism in the instruction lowering pattern language in order to control where instructions are inserted or how they are later reordered during the SelectionDiag linearization?
I know the glue chain that stick instructions together. But such mechanism in not provided in instruction lowering pattern.
I'm facing many situations where some patterns are lowered into valid sequences of consecutive SDNodes/Instructions.
Such sequences have no glue, so later during Instruction Scheduling/SelectionDiag linearization the instructions are moved out of valid context.
Is there some Instruction flags or others features that could delimit the reordering could cross some limit?

TIA,        Dominique Torette


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Dominique Torette
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