[llvm-dev] [GSOC 2018] Improve code generation testing

[Matthias Braun via llvm-dev]

> On Mar 3, 2018, at 8:22 PM, Janardhan Pulivarthi via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> Hi Matthias,
please add me to CC when contacting me. I'm not always able to keep up with all the traffic on the llvm mailing lists.

> 
> I am a fourth year undergraduate student with some knowledge working on code generation, but with the java backend (committer at an Apache project) and have C++ as my primary language.
> 
> 
> What I've done so far?
> -----
> 1. I've created an account on bugzilla
> 2. studying LLVM ProgrammersManual
> 3. studying LLVM CodingStandards
> 
> Help
> ----
> 1. trying to setup `llvm-core` and `clang` on Microsoft Visual Studio 2017, can I work windows or please find me a best configuration of OS. 
It’s best to read the Getting Started documentation: http://llvm.org/docs/GettingStarted.html <http://llvm.org/docs/GettingStarted.html> and in your case: http://llvm.org/docs/GettingStartedVS.html <http://llvm.org/docs/GettingStartedVS.html>

Developing llvm on the command line with cmake/ninja (on linux, macOS, windows linux subsystem(?), ...) is probably the more common configuration and may increase your chances of getting help. You also usually can find help with getting started on the IRC channel.

> 2. Can I fix any bug related to codegen testing.

In theory you should be able to dump a program to .mir at any point in the codegen pipeline and continue later. In practice this is still fails a lot so an easy way to find something to fix is picking test cases from say llvm/test/CodeGen/{AArch64|X86|…}/*.ll and do something like:

# A) This should just work, you may need to add some of the extra flags at the beginning of the file
$ llc testcase.ll

# B) It should be possible to interrupt at any pass ("prologepilog" in this example) and resume. But in practice this often fails:
$ llc -stop-before prologepilog  testcase.ll -o /tmp/before_prologepilog.mir
$ llc -start-before prologepilog /tmp/before/prologepilog.mir

It should be easy to find cases where A) works and B) fails. You could write some scripts to find these cases and also experiment with other passes than "prologepilog". I found dozens when I just tried it, to give you two examples:

test/CodeGen/X86/2012-08-28-UnsafeMathCrash.ll   results in:
error: /tmp/stopped.mir:92:37: missing implicit register operand 'implicit %st0'
    UCOM_Fr $st1, implicit-def $fpsw

test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll results in:
error: /tmp/stopped.mir:84:20: alloca instruction named '<unnamed alloca>' isn't defined in the function 't'
  - { id: 0, name: '<unnamed alloca>', type: default, offset: 0, size: 4,

- Matthias

> 
> 
> Thanks a lot,
> Janardhan
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