[llvm-dev] Possibility of implementing a low-level naive lock purely with LLVM atomics?

[Zhang via llvm-dev]

Hi:
In our frontend we are attempting to build a lock mechanism without using system apis like pthreads and whatnot for internal reasons.
In order to achieve this we are now creating a int32 type GV, and then use atomic load/store and comparisons. The generated IR looks like the following:


```
@Flag = private global i32 0, align 4
%0 = load atomic i32, i32* @Flag acquire, align 4
%1 = icmp eq i32 %0, 1
.......
store atomic i32 1, i32* @Flag release, align 4
```


However when inspecting the generated assembly on x86-64, the following assembly was generated:
```

mov        qword [rbp+var_50], rcx

mov        qword [rbp+var_48], rdx

mov        rbx, rsi

mov        r15, rdi

mov        eax, dword [l_Flag]                ; l_Flag

cmp        eax, 0x1

```


Which to my best knowledge is not atomic. 
I'd like to know how do I fix my frontend to make sure the locking mechanism works




Zhang
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