[llvm-dev] Lowering SEXT (and ZEXT) efficiently on Z80

[Michael Stellmann via llvm-dev]

I'm working on a Z80 backend and am trying to efficiently lower SEXT, 
specifically 8 to 16 bit, in LowerOperation() according to the following 
rules:

The Z80 has 8 bit registers and 16 bit registers, which are aliased 
versions of two 8 bit registers.

8 bit registers are named A, H, L, D, E and some more.
16 bit registers are HL (composed of H + L), DE (D + E) - and some more 
- with L and E being the low bits (LSB).

For SEXT from 8 to 16 bit, here are the rules to do it efficiently:

8 bit reg  ->  16 bit reg
Fast extension:
L              HL, by making MSB (H) = 0/255
E              DE, by making MSB (D) = 0/255

Slow (costly) extension:
H              HL or DE, by making LSB (D or L) = H and MSB (H) = 0/255
D              same as above

Reg "A" doesn't have a 16 bit register pair, so SEXT must always done as 
a "slow" operation.

For the fast extension, how could an efficient lowering be done so L 
prefers being extended into HL and E into DE (and saving any previous 
content of H or D somewhere else)?

And for the slow extension, would creating a virtual 16 bit register 
pair for the destination also include a register pair that is composed 
of the source reg, i.e. H into HL - or even prefer it, if all are used?

Thanks,
Michael