[llvm-dev] [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths

[Graham Hunter via llvm-dev]

Hi Robin,

> On 7 Jul 2018, at 14:46, Robin Kruppe <robin.kruppe at gmail.com> wrote:
> 
> Hi Graham,
> 
> thanks again. The changes and additions all make sense to me, I just
> have one minor comment about shufflevector.

Thanks, I think we're getting to the point where reviewing the patches makes sense
as a next step.

>> ===========================================
>> 5. Splitting and Combining Scalable Vectors
>> ===========================================
>> 
>> Splitting and combining scalable vectors in IR is done in the same manner as
>> for fixed-length vectors, but with a non-constant mask for the shufflevector.
> 
> It makes sense to have runtime-computed shuffle masks for some
> architectures, especially those with runtime-variable vector lengths,
> but lifting the current restriction that the shufflevector mask is a
> constant affects all code that inspects the indices. There's lot such
> code and as far as I've seen a fair amount of that code crucially
> depends on the mask being constant. I'm not opposed to lifting the
> restriction, but I want to call attention to it and double-check
> everyone's okay with it because it seems like a big step and, unlike
> other IR changes in this RFC, it isn't really necessary (we could also
> use an intrinsic for these shuffles).

The way we implemented this was to have a second getShuffleMask function
which took a pointer to a Value instead of a Constant; this function will
return false if the mask is either scalable or not a constant, or true
and set the contents of the provided SmallVectorImpl ref to the constant
values.

This means all existing code for other targets doesn't need to change since
they will just call the existing method. Some common code will require changes,
but would also need to change anyway to add support for a variable shufflevector
intrinsic.

See patch https://reviews.llvm.org/D47775 -- the extra getShuffleMask is
implemented in lib/IR/Instructions.cpp and an example of its use is in
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp.

I did mention a possible VECTOR_SHUFFLE_VAR intrinsic in that patch, to be
used in the same manner as experimental_vector_splatvector as a stand-in
for an ISD node when lowering to SelectionDAG. In our downstream compiler
both of those are generic ISD nodes instead of intrinsics, and I think we'd
try to get that upstream eventually.

If another method is preferred, that's fine, but I think this minimizes the
changes required.

-Graham