[llvm-dev] [RFC][VECLIB] how should we legalize VECLIB calls?

Saito, Hideki via llvm-dev llvm-dev at lists.llvm.org
Tue Jul 3 12:28:39 PDT 2018


For reference, Intel's vector function ABI is located here.
 https://software.intel.com/sites/default/files/managed/b4/c8/Intel-Vector-Function-ABI.pdf

GCC (for x86) has a very similar but slightly different vector function ABI. Intel compiler has a flag to choose between the two (actually does more than two if someone cares about such details). 

I see ARM inherited a lot from those, which makes implementers' life easier.


-----Original Message-----
From: Renato Golin [mailto:renato.golin at linaro.org] 
Sent: Tuesday, July 03, 2018 4:43 AM
To: Hal Finkel <hfinkel at anl.gov>
Cc: Saito, Hideki <hideki.saito at intel.com>; Sanjay Patel <spatel at rotateright.com>; Michael Zolotukhin <mzolotukhin at apple.com>; LLVM Dev <llvm-dev at lists.llvm.org>; Davide Italiano <dccitaliano at gmail.com>; Masten, Matt <matt.masten at intel.com>
Subject: Re: [llvm-dev] [RFC][VECLIB] how should we legalize VECLIB calls?

On Tue, 3 Jul 2018 at 00:35, Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> I completely agree. We need a solution to handle 'declare simd' calls, or to put it another way, arbitrary user-defined functions. To me, this really looks like an ABI issue. If we have a function, __foo__computeit8(<8 x float> %x), then if our lowering of <8 x float> doesn't match the required register assignments, then we have the wrong ABI. Will https://reviews.llvm.org/D47188 fix this?

FYI, Arm has published a draft of a similar proposal:

https://developer.arm.com/products/software-development-tools/hpc/arm-compiler-for-hpc/vector-function-abi

They directly mention OpenMP declare simd, but there's no reason we can't apply something similar to Clang (and GCC) pragmas as well.

cheers,
--renato


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