[llvm-dev] Disable spilling sub-registers in LLVM

[ahmede via llvm-dev]

Hi,


I wonder if there is a way in LLVM to disable spilling a register-class 
while still enabling the super-registers of this register-class to be 
spilled.

If not, how can we implement spilling for sub-registers when stack 
load/stores can only operate on the super registers? Is there a way even 
if it is suboptimal?


Thanks,
Ahmed