[llvm-dev] X86 new registers not being allocated
Quentin Colombet via llvm-dev
llvm-dev at lists.llvm.org
Tue Jan 23 10:25:52 PST 2018
Hi Barbora,
What is important for using new registers is to have instructions that are “compatible" with them.
In a nutshell, if you don’t have any instruction that uses your new register class, then it won’t be used. Basically, it is useless to have a value living in a container you cannot address.
Cheers,
-Quentin
> On Jan 21, 2018, at 4:29 PM, Barbora Murinová via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> Hi all,
>
> I have a bunch of new registers set up in X86RegisterInfo.td, the important part being
>
> def PR128 : RegisterClass<"X86", [i128],
> 128, (sequence "POI%u", 0, 7)>;
>
> def VR128 : RegisterClass<"X86", [v4f32, v2f64, v16i8, v8i16, v4i32, v2i64],
> 128, (add PR128, FR32)>;
>
> I have an entry in X86ISelLowering.cpp:
>
> addRegisterClass(MVT::i128, &X86::PR128RegClass);
>
> and in findRepresentativeClass():
>
> case MVT::i128:
> RRC = &X86::PR128RegClass;
>
> But even though my nodes have MVT::i128 value type, they get allocated to XMM registers. I have, of course, removed i128 from FR128. What am I missing?
>
> Thanks,
> Barbora
>
> --
> ----------------
> Barbora Murinová
> The University of Edinburgh
> SK: +421905718390
> UK: +447477833795
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180123/d47748f2/attachment.html>
More information about the llvm-dev
mailing list