[llvm-dev] How to get started with instruction scheduling? Advice needed.
Leslie Zhai via llvm-dev
llvm-dev at lists.llvm.org
Thu Jan 11 04:10:30 PST 2018
Hi Phil,
> I've been watching this presentation from a 2014 LLVM dev meeting
Thanks for your sharing!
I am reviewing:
* The chapter 10 (Instruction Level Parallelism) and chapter 11
(Optimizing for Parallelism and Locality) of Compiler Principle[1]
* Adding and Optimizing a Subtarget for MIScheduler[2] by Dave Estes
* Scheduler for in-order processors - what's present and what's missing
in LLVM[3] by Javed Absar
* Writing Great Machine Schedulers[4] by Javed Absar and Florian Hahn
Hi Alex,
Please leading me to implement Machine scheduling model for at least one
core (e.g. Rocket, PULP)[5]
Rocket - RV64G - "in-order", single-issue applicaEon core, BOOM - RV64G
- "out-of-order", superscalar applicaEon core[6]
So what about PULP? is it in-order or out-of-order?
Hi LLVM developers,
Welcome to review our work about porting GlobalISel to RISCV[7] and give
us some suggestion, thanks a lot!
[1]
https://en.wikipedia.org/wiki/Compilers:_Principles,_Techniques,_and_Tools
[2] https://llvm.org/devmtg/2014-10/Slides/Estes-MISchedulerTutorial.pdf
[3] https://llvm.org/devmtg/2016-09/slides/Absar-SchedulingInOrder.pdf
[4] https://youtu.be/brpomKUynEA
[5] https://github.com/lowRISC/riscv-llvm/issues/27
[6]
https://riscv.org/wp-content/uploads/2016/01/Wed1345-RISCV-Workshop-3-BOOM.pdf
[7] http://lists.llvm.org/pipermail/llvm-dev/2018-January/120098.html
--
Regards,
Leslie Zhai - https://reviews.llvm.org/p/xiangzhai/
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