[llvm-dev] retpoline mitigation and 6.0

Craig Topper via llvm-dev llvm-dev at lists.llvm.org
Wed Feb 7 15:47:54 PST 2018


I'll save you a review iteration. This is updated to match llvm coding
style. Capital camel case variable names and uses LLVM_FALLTHROUGH instead
of the comment.

 static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
                               char Mode, raw_ostream &O) {
   unsigned Reg = MO.getReg();
+  bool EmitPercent = true;
+
   switch (Mode) {
   default: return true;  // Unknown mode.
   case 'b': // Print QImode register
@@ -384,6 +386,9 @@ static bool printAsmMRegister(X86AsmPrinter &P, const
MachineOperand &MO,
   case 'k': // Print SImode register
     Reg = getX86SubSuperRegister(Reg, 32);
     break;
+  case 'V':
+    EmitPercent = false;
+    LLVM_FALLTHROUGH;
   case 'q':
     // Print 64-bit register names if 64-bit integer registers are
available.
     // Otherwise, print 32-bit register names.
@@ -391,7 +396,10 @@ static bool printAsmMRegister(X86AsmPrinter &P, const
MachineOperand &MO,
     break;
   }

-  O << '%' << X86ATTInstPrinter::getRegisterName(Reg);
+  if (EmitPercent)
+    O << '%';
+
+  O << X86ATTInstPrinter::getRegisterName(Reg);
   return false;
 }


~Craig

On Wed, Feb 7, 2018 at 3:40 PM, David Woodhouse via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> On Wed, 2018-02-07 at 23:30 +0000, Chandler Carruth wrote:
> > This should go to llvm-commits as a proper review. Do you want to do
> > that David? Want someone on our end to pick it up?
>
> I'll attempt to add some test cases...
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>
>
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