[llvm-dev] LLVM Backend for a platform with no (normal) stack
JD Jones via llvm-dev
llvm-dev at lists.llvm.org
Fri Dec 14 09:05:27 PST 2018
Thanks for your response. Please see below.
From: Bruce Hoult [mailto:brucehoult at sifive.com]
Sent: Thursday, December 13, 2018 5:58 PM
To: jjones at prc-hsv.com
Cc: LLVM Developers Mailing List <llvm-dev at lists.llvm.org>
Subject: Re: [llvm-dev] LLVM Backend for a platform with no (normal) stack
Do you have a register that you can store a memory address
>> yes
in and an addressing mode that allows you to add (or subtract) a constant to that register
>> Sometimes
and use the address calculated to load//store from memory? Do you have enough registers that you can keep one of them permanently pointed to a particular memory region?
>> No
The platform intentionally does not allow use of some large chunk of memory for shared use by function calls. I can allocate memory (so long as I know the necessary size before-hand). I can work around this issue, but if someone has already addressed it, I’d like to learn from their experiences before rolling my own.
If yes, then you have a stack to exactly the same extent as RISC-V or MIPS do.
On Thu, Dec 13, 2018 at 12:53 PM JD Jones via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> > wrote:
Dear Sir or Ma’am;
I have found a wealth of help and information on writing an LLVM backend. And, my platform has no stack.
Can you point me to any information that would specifically address creating a backend for this kind of platform?
In previous wanderings, I thought I ran across a phrase “platforms with no stack such as FPGAs”, but I can’t find that mention, now.
More thanks than I can type,
JD Jones
Software Engineer
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