[llvm-dev] How to create and insert a call MachineInstr?

Tim Northover via llvm-dev llvm-dev at lists.llvm.org
Tue Apr 17 02:40:31 PDT 2018


Hi Will,

On 17 April 2018 at 06:24, Will Lester <hslester96 at gmail.com> wrote:
> I'm sorry to bother you again. Since I have met the problem, how to check
> used registers and avoid clobbering live registers, which you mentioned in
> the email.

The easiest way to do it would be to run before register allocation.
Then the allocator itself would handle that for you. If that's not an
option then I think there are two options:

  + Save and restore the registers manually. You'd emit push & pop
instructions surrounding your actual call to do that.
  + Call a (probably assembly) stub that saves *all* the registers
before calling your actual function.

> I am working in the function X86InstrInfo::storeRegToStackSlot, which is in
> lib/Target/X86/X86InstrInfo.cpp.

I could see that working too, though you'd have to reserve a stack
slot to do it.

> And I have an extra problem, may I use MOV64mr and two addReg to set two
> registers as its arguments? I want to use content of one register as the
> address to be stored, and content of the other register as the source.

Unfortunately x86 addressing modes are more complicated than that, and
you always need all the operands in LLVM. They're defined in
X86InstrInfo.td (look for X86MemOperand), but in outline the arguments
for a memory address ("base + scale reg * index + offset in some
segment") are:

  + A base register
  + An immediate scale for the index register
  + An index register.
  + An immediate total offset.
  + A segment register (or 0 for default by the looks of it).

So for just a register you'd want
".addReg(MyReg).addImm(1).addReg(0).addImm(0).addReg(0)". The llvm-mc
utility can be useful for experiments here (it's what I used):

$ echo "movq %rbx, (%rax)" | llvm-mc -show-inst
.section __TEXT,__text,regular,pure_instructions
movq %rbx, (%rax)            ## <MCInst #1486 MOV64mr
                                        ##  <MCOperand Reg:106>
                                        ##  <MCOperand Imm:1>
                                        ##  <MCOperand Reg:0>
                                        ##  <MCOperand Imm:0>
                                        ##  <MCOperand Reg:0>
                                        ##  <MCOperand Reg:108>>

If you fiddle about with the various addressing-modes you can see how
each affects the LLVM instruction.

Cheers.

Tim.


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