[llvm-dev] How to specify the RegisterClass of an IMPLICIT_DEF?

[Dominique Torette via llvm-dev]

After further investigation of the TargetLoweringBase class, the register is allocated from RegisterClass defined by the RegClassForVT[] table.
This table is defined by the addRegisterClass() sequence. Only the last RegisterClass for a given type is kept.
So by ordering the addRegisterClass() sequence, you can enforce the allocated RegisterClass.
I my case, this lead to a more optimized generated code.

Thanks for your general advice.	Regards,	Dominique Torette.

-----Original Message-----
From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Krzysztof Parzyszek via llvm-dev
Sent: jeudi 12 avril 2018 15:17
To: llvm-dev at lists.llvm.org
Subject: Re: [llvm-dev] How to specify the RegisterClass of an IMPLICIT_DEF?

On 4/12/2018 8:01 AM, Dominique Torette via llvm-dev wrote:
> 
> But there is one small issue in the inference of RegisterClass of the 
> implicitly defined register.
> 
> As shown below, the %vreg6<def> is implicitly defined as FPUabRegisterClass.
> 
> This register class accepts the v2f32 type, but for others addressing 
> mode context this register should be FPUabOffsetClass.
> 
> Is there a mechanism, an option to inforce/control the RegisterClass 
> of registers defined by IMPLICIT_DEF ?

A virtual register has a specific register class assigned to it, and is implicitly a member of any superclass of that class. If you want to use the register in a place that requires another class, you will need to create a new virtual register for the new class and copy the value into it.

In instruction selection, it's usually the type of the value that determines the register class of the register holding it. Also, the register classes of instruction operands can restrict it further. If you want to put a certain value into a register from a specific class, you can use COPY_TO_REGCLASS (just like the code you quoted does):
   Dst = COPY_TO_REGCLASS Src, RegClass

-Krzysztof

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