[llvm-dev] Difference between Predicates and Requires in td file

[陳韋任 via llvm-dev]

Hi All,

  I am looking for how to distinguish instructions between subtargets,
and it seems both
Predicates and Requires be able to do that. Take Hexagon as example, I see

  let Predicates = [HasV5T] in {
    def: Pat<(f32 (fminnum F32:$Rs, F32:$Rt)), (F2_sfmin F32:$Rs, F32:$Rt)>;
    def: Pat<(f32 (fmaxnum F32:$Rs, F32:$Rt)), (F2_sfmax F32:$Rs, F32:$Rt)>;
  }

and this

  def: Pat<(sra (add (sra I64:$src, u6_0ImmPred:$u6), 1), (i32 1)),
                (S2_asr_i_p_rnd DoubleRegs:$src, imm:$u6)>, Requires<[HasV5T]>;

Are they really the same? If so, I guess if I have multiple
instructions belong to one
specific subtarget, I should use Predicates; otherwise, just use
Requires. Am I right
or wrong?

  Thanks.

Regards,
chenwj

-- 
Wei-Ren Chen (陳韋任)
Homepage: https://people.cs.nctu.edu.tw/~chenwj