[llvm-dev] Issues in Vector Add Instruction Machine Code Emission

[hameeza ahmed via llvm-dev]

Hello,
I am trying to emit binary for my implemented vector instructions. Although
yet i havent done any change or addition in MC framework, For vector load
instruction there are no error coming. But for vector add

instruction is something like this;

> %R_0_REG2048b_1<def> = P_256B_VADD %R_0_REG2048b_1<kill>,
%R_0_REG2048b_0<kill>

I am getting the following error:

Unknown immediate size
UNREACHABLE executed at /lib/Target/X86/MCTargetDesc/X86BaseInfo.h:574!


 i made  extensive use of gdb and after debugging i found the line with
issue in X86MCCodeEmitter.cpp.

Here NumOps=3 (all registers). and CurOp is 1st initialized to 0.

then, the following code gets executed;

case X86II::MRMDestReg: {
    EmitByte(BaseOpcode, CurByte, OS);
    unsigned SrcRegNum = CurOp + 1; //SrcRegNum=1
EmitRegModRMByte(MI.getOperand(CurOp),
                     GetX86RegNum(MI.getOperand(SrcRegNum)), CurByte, OS);
    CurOp = SrcRegNum + 1;
    break;
  }
so here CurOp becomes 2.

After this;

it comes to;
else {
    // If there is a remaining operand, it must be a trailing immediate.
Emit it
    // according to the right size for the instruction. Some instructions
    // (SSE4a extrq and insertq) have two trailing immediates.
    while (CurOp != NumOps && NumOps - CurOp <= 2) {
      EmitImmediate(MI.getOperand(CurOp++), MI.getLoc(),
                    X86II::getSizeOfImm(TSFlags), getImmFixupKind(TSFlags),
                    CurByte, OS, Fixups);
    }

here CurOp=2 !=NumOps=3 && 3-2<=2
so while condition is satisfied and it goes to emitimmediate which is wrong
and there prints error message.

Since, there are no immediate involved in instruction, it should not go to
emitimmediate. How to solve this issue?

Please help.

Thank You
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