[llvm-dev] Reaching definitions on Machine IR post register allocation

[Raghavan, Venugopal via llvm-dev]

Hi,

Given a definition of a register by a machine instruction in the Machine IR post register allocation, I would like to compute the set of uses of this register reached by this definition.
Does LLVM already have this kind of analysis I can use? Otherwise, I will have to implement a reaching definitions analysis which would be a little involved since it would need to work on a non-SSA IR form.

If something already exists that would be very helpful for me.

Thanks.

Regards,
Venugopal Raghavan.
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