[llvm-dev] How vregs are assigned to operands in IR

[Friedman, Eli via llvm-dev]

On 10/25/2017 4:21 PM, Nisal Menuka via llvm-dev wrote:
> Hi,
> I'm trying to understand how virtual regs are assigned to operands in
> IR instructions. I looked into SelectionDAG but could not figure out
> where the assignment happens.  How and where does this conversion
> happen?
> Furthermore, I want to build a map between variable and the virtual
> register (x corresponds to vreg11 in below code).
> I've been stuck here for a while. Any help is greatly appreciated.

InstrEmitter::CreateVirtualRegisters actually creates the registers.  
See 
http://llvm.org/docs/CodeGenerator.html#instruction-selection-section 
for more info on how instruction selection works.  "-debug" output might 
also be helpful to get a brief outline of what's happening.

That said, you probably don't want to reinvent debug info.  See 
http://llvm.org/docs/SourceLevelDebugging.html .

-Eli

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