[llvm-dev] IR Pass Ordering Sensitivity

Davide Italiano via llvm-dev llvm-dev at lists.llvm.org
Sat Oct 14 15:52:12 PDT 2017


On Sat, Oct 14, 2017 at 11:05 AM, John Regehr via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> These are definitely LLVM bugs. It would be best to report reduced test
> cases against top of tree.
>
> We should have some automated infrastructure for finding these too...
>
> John
>

Zhendong & friends generally do that (and reported many bugs :) I
tried that myself, but never got to automate the whole procedure.
While the problem is combinatorial in nature, evidence shows that you
don't need to enumerate all the possible combination of passes to
break LLVM. I think an `opt` option would be a good start. You can
then take the testsuite and run with that, or generate random IR with
llvm-stress and pipe that to opt. The swift folks have a slightly more
sophisticated infrastructure for doing this (you can dump the SIL
pipeline in a YAML file, and then IIRC, feed that back to `sil-opt`),
but something simpler will do, IMHO. Happy to discuss this further if
folks are in California next week :)

Thanks,

--
Davide


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