[llvm-dev] General question about enabling partial inlining
Jun Lim via llvm-dev
llvm-dev at lists.llvm.org
Tue Oct 3 12:56:10 PDT 2017
From: Xinliang David Li [mailto:xinliangli at gmail.com]
Sent: Tuesday, October 3, 2017 3:22 PM
To: Jun Lim <junbuml at codeaurora.org>
Cc: Graham Yiu <gyiu at ca.ibm.com>; llvm-dev <llvm-dev at lists.llvm.org>
Subject: Re: [llvm-dev] General question about enabling partial inlining
On Tue, Oct 3, 2017 at 9:21 AM, Jun Lim via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> > wrote:
Hi Graham,
Thanks for sharing this. Are you planning on enabling the pass only on PGO? Even in non-PGO, I noticed some performance gains when we are aggressive in partially inlining the early return part, especially when the callee spill CSRs in the entry block. At a high level, I have two questions:
1. What is the main obstacle that prevent the pass from being enabled by default?
2. Would it make sense to give some bonus in the cost model when we detect the possibility of spilling CSRs in the entry block?
More enhanced shrink-wrapping will probably take care of this, so using partial inlining to do that seems like a wrong motivation :)
In some cases, shrink-wrapping cannot shrink and we need to spill in the entry block. In such case partial inlining might help avoiding the execution of spilling CSRs. For example, I also saw 10% improvement in spec2006/astar when we completely avoid executing CSR spills in the entry block using partial inlining. However, as far as I know, the enhanced shrink-wrapping will help more partial shrinking wrapping.
David
1.
Thanks,
Jun
From: Graham Yiu [mailto:gyiu at ca.ibm.com <mailto:gyiu at ca.ibm.com> ]
Sent: Tuesday, October 3, 2017 11:08 AM
To: junbuml at codeaurora.org <mailto:junbuml at codeaurora.org>
Cc: llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>
Subject: Re: [llvm-dev] General question about enabling partial inlining
Hi Jun,
We're actually looking at enhancing the partial inlining pass right now (see <http://lists.llvm.org/pipermail/llvm-dev/2017-August/116515.html> http://lists.llvm.org/pipermail/llvm-dev/2017-August/116515.html)
We'd be interested in turning on the pass by default some time in the future, if our enhancements prove beneficial.
Cheers,
Graham Yiu
LLVM Compiler Development
IBM Toronto Software Lab
Office: (905) 413-4077 <tel:(905)%20413-4077> C2-707/8200/Markham
Email: gyiu at ca.ibm.com <mailto:gyiu at ca.ibm.com>
via llvm-dev ---09/13/2017 01:12:02 PM---Hi, I noticed some performance gains in some spec benchmarks without
From: via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> >
To: llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>
Date: 09/13/2017 01:12 PM
Subject: [llvm-dev] General question about enabling partial inlining
Sent by: "llvm-dev" <llvm-dev-bounces at lists.llvm.org <mailto:llvm-dev-bounces at lists.llvm.org> >
_____
Hi,
I noticed some performance gains in some spec benchmarks without
significant code size bloat when aggressively performing partial
inlining, especially when the original callee spill CSRs in the entry
block. I guess the partial inlining is not enabled mainly due to the
code size. Is there any other issue which prevent the pass from being
enabled? Do we have any plan or any on-going works to enable partial
inlining ?
Thanks,
Jun
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Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a
Linux Foundation Collaborative Project.
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