[llvm-dev] LLVM Weekly - #196, Oct 2nd 2017

Alex Bradbury via llvm-dev llvm-dev at lists.llvm.org
Mon Oct 2 09:56:50 PDT 2017


LLVM Weekly - #196, Oct 2nd 2017
================================

If you prefer, you can read a HTML version of this email at
<http://llvmweekly.org/issue/196>.

Welcome to the one hundred and ninety-sixth issue of LLVM Weekly, a weekly
newsletter (published every Monday) covering developments in LLVM, Clang, and
related projects. LLVM Weekly is brought to you by [Alex
Bradbury](http://asbradbury.org). Subscribe to future issues at
<http://llvmweekly.org> and pass it on to anyone else you think may be
interested. Please send any tips or feedback to <asb at asbradbury.org>, or
@llvmweekly or @asbradbury on Twitter.


## News and articles from around the web

Video and slides are [now
available](https://connect.linaro.org/resource/sfo17/sfo17-110/) from the talk
"Getting Started with LLVM. The TL;DR Version", by Diana Picus.

If you're interested RISC-V support for LLVM, you might appreciate my [recent
RISC-V LLVM status
update](http://www.lowrisc.org/blog/2017/09/moving-risc-v-llvm-forwards/) on
the lowRISC blog. See below for details about the upcoming birds of a feather
session and a working session after the LLVM dev meeting.

Reminder: the [LLVM Dev Meeting](https://llvm.org/devmtg/2017-10/) is now just
a couple of weeks away (Oct 18-19th, San Jose). You can see the whole program
[on sched.com](https://2017llvmdevmtg.sched.com/). Registration will be
closing soon. Additionally, Tanya is
[looking](http://lists.llvm.org/pipermail/llvm-dev/2017-September/117773.html)
for volunteer session moderators.

Videos from CppCon 2017 are [now appearing on
YouTube](https://www.youtube.com/playlist?list=PLHTh1InhhwT6bwIpRk0ZbCA0N2p1taxd6).


## On the mailing lists

* I (Alex Bradbury) am [collecting
topics](http://lists.llvm.org/pipermail/llvm-dev/2017-September/117832.html)
for the RISC-V birds of a feather session at the LLVM Dev Meeting. This will
be held [Wed 18th Oct,
4.20-5.05pm](https://2017llvmdevmtg.sched.com/event/CMiv/co-ordinating-risc-v-development-in-llvm).
I'm also organising a
[longer working
session](https://groups.google.com/a/groups.riscv.org/d/msg/sw-dev/QG8zlSuNf7E/Zc_eWhITBQAJ),
for Friday 20th October, which will also be held in San Jose. See the linked
thread for more details and please contact me at asb at lowrisc.org if you would
like to attend.

* Tom Stellard has shared the [proposed release schedule for LLVM
5.0.1](http://lists.llvm.org/pipermail/llvm-dev/2017-September/117729.html).

* Discussion on the RFC for an IR-level interprocedural code outliner has
continued. Jessica Paquette has
[proposed](http://lists.llvm.org/pipermail/llvm-dev/2017-September/117814.html)
how code could be shared between the MachineOutliner and this IR-level
outliner.

* Brian M. Rzycki has
[proposed](http://lists.llvm.org/pipermail/llvm-dev/2017-September/117804.html)
adding new APIs for "CFG-level" IR manipulation. The hope is this will reduce
code complexity in the common case. Daniel Berlin
[responded](http://lists.llvm.org/pipermail/llvm-dev/2017-September/117805.html)
with some feedback on this direction.

* Joerg Sonnenberger has written on RFC on [enabling reproducible builds using
Clang](http://lists.llvm.org/pipermail/cfe-dev/2017-September/055620.html).
New command-line options are needed prevent absolute paths leaking in to
builds.

* Davide Italiano has
[proposed](http://lists.llvm.org/pipermail/llvm-dev/2017-September/117835.html)
adding an intrinsic for 'cls' (count leading sign bits). This is motivated by
making it easier to generate the AArch64 cls instruction.


## Review corner

The LLVM Weekly review corner serves to highlight patches that are stuck
waiting awaiting review, or work from first-time contributors. See
[here](http://llvmweekly.org/reviewcorner) for more information and how to
submit you work for inclusion. Of course the hope is that highlighting these
patches will enable LLVM Weekly readers will step up and help to get them
merged. I'll be reporting back each week on any activity generated on these
patches, as well as sharing a new batch. If you want your patch included you
must submit it via the linked form.

Last week featured four patches, with three out of four seeing fresh review
activity after inclusion. [D36357](https://reviews.llvm.org/D36357) sadly
still has no feedback. Thanks to Dimitry Andric, Matthias Braun, and Anna Zaks
for contributing review comments to last week's patches.

Unfortunately I've received no valid submissions for inclusion in this week's
issue. I'm going to keep the review corner trial going for a little longer,
but obviously without patch submissions we might conclude that the review
corner experiment should go to an end.

In the absence of external submissions, let me advertise my own stuck review:

* "Adds initial code generation support for RV32 (32-bit RISC-V). Along with
[D29934](https://reviews.llvm.org/D29934), this is blocking three successfully
reviewed patches." [D29933](https://reviews.llvm.org/D29933), patch by Alex
Bradbury.


## LLVM commits

* MC-layer support for AArch32 v8.3-a complex numbers has been added.
[r314511](http://reviews.llvm.org/rL314511).

* The X86 backend now uses `INSERT_SUBREG` rather than `SUBREG_TO_REG` when
matching an `anyext GR32` pattern.
[r314152](http://reviews.llvm.org/rL314152).

* The MachineOutliner has been updated to avoid saving restoring the link
register if possible when used with the AArch64 target.
[r314341](http://reviews.llvm.org/rL314341).

* Support has been commited for common fixups and relocations in the RISC-V MC
layer. [r314389](http://reviews.llvm.org/rL314389).

* TargetInstrInfo::getInlineAsmLength has learned to parse certain forms of
the `.space` directive. This is primarily useful for crafting testing inputs
that exercise the branch relaxation pass.
[r314393](http://reviews.llvm.org/rL314393).


## Clang commits

* Design documentation has been committed for Clang's refactoring engine.
[r314509](http://reviews.llvm.org/rL314509).

* A new "vexing parse" warning has been added for when there is ambiguity
between a variable declaration and a function-style cast.
[r314570](http://reviews.llvm.org/rL314570).


## Other project commits

* LLD gained a huge speedup for `-r` and `--emit-relocs`, which reduces link
time of the Linux kernel from 12.95s to 0.55s.
[r314282](http://reviews.llvm.org/rL314282).

* LLD's string merging has been parallelized. This reduces the link time of a
Clang debug build from 7.11s to 5.16s (4x faster than gold, as tested by the
committer). [r314588](http://reviews.llvm.org/rL314588).

* The benchmark numbers in the LLD documentation have been updated.
[r314617](http://reviews.llvm.org/rL314617).

* The sanitizer allocator's "release memory to OS" implementation has been
rewritten. See the commit message for full design details.
[r314311](http://reviews.llvm.org/rL314311).

* Polly gained a short document describing Polly's performance for GEMM
(generalized matrix multplication), and the impact on compile time.
[r314419](http://reviews.llvm.org/rL314419).


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