[llvm-dev] PPC64 Disassembler

[Sean Fertile via llvm-dev]

Hello Leonardo,

What is the opcode of the MCInstrDesc?

Sean

On Wed, Nov 29, 2017 at 1:48 PM, Leonardo Bianconi via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> Hi all,
>
>
>
> I’m working on lldb to make it available to ppc64le, but the “step over”
>
> is not working for some cases.
>
>
>
> When debugging, I can see that the disassembler analyze some instructions
>
> forward, looking for a branch instruction
>
> (llvm/tools/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp:87
>
> – “const bool can_branch = mc_disasm_ptr->CanBranch(inst);”), while
>
> trying to set the next breakpoint.
>
>
>
> On this case, the instruction is the “bne     cr7,0x2000092c”, which is a
> branch,
>
> but at llvm/lib/MC/MCInstrDesc.cpp:35 –
>
> “if (isBranch() || isCall() || isReturn() || isIndirectBranch())” it returns
> false,
>
> making lldb do not set the correct breakpoint, so the execution does not
> stop
>
> at next line, which should be the “step over” behavior.
>
>
>
> The variable “Flags” for the disassembled instruction does not have the
> branch
>
> flag.
>
>
>
> I have tried to change the file “/lib/Target/PowerPC/PPCInstrInfo.td”,
> adding
>
> “isBranch = 1” for the instruction "bc 4, $bi, $dst", but had not effect.
>
>
>
> Comparing with x86_64, building the same cpp file, the instruction
>
> “jne    0x4005eb” has the branch flag, which identifies it as a branch
> instruction.
>
>
>
> Where is the definition that an instruction is a branch? Is it a bug?
>
>
>
> Thanks!
>
>
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