[llvm-dev] [atomics][AArch64] Possible bug in cmpxchg lowering

[Geoff Berry via llvm-dev]

I've done some more digging and it looks like:

- the code clang emits for the non-constant memory ordering parameters 
seems to agree (on aarch64) with the constant case in the 
release/acquire case, in that it ends up lowering to a cmpxchg release 
monotonic.  On targets that use fences though the code generated could 
be different for the non-constant vs constant case.

- the reason cmpxchg release acquire doesn't fail validation is because 
AtomicOrdering.h defines isStrongerThan(Acquire, Release) to be false.

I don't have an immediate need to get this changed, so I think I'll just 
wait to see if there is any other input and file a bug.

On 5/30/2017 6:49 PM, Tim Northover wrote:
> On 30 May 2017 at 15:40, Tim Northover <t.p.northover at gmail.com> wrote:
>> So changing LLVM to do the same as GCC does seem like a decent idea to
>> me. But remember to update the LangRef to make it clear.
> Oh, and if you do this you may want to check what Clang does when the
> order isn't a compile-time constant. Schematically it does a couple of
> switches and a nested set of cmpxchgs with all possible ordering
> constraints.
>
> Those switches may or may not include the cases you're interested in.
>
> Cheers.
>
> Tim.

-- 
Geoff Berry
Employee of Qualcomm Datacenter Technologies, Inc.
  Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.  Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.