[llvm-dev] UD and DU chains for LLVM IR before running mem2reg

[David Chisnall via llvm-dev]

On 25 May 2017, at 17:06, Jajoo, Malhar <malhar.jajoo14 at imperial.ac.uk> wrote:
> 
> Hi David,
> 
> Thanks for your reply. 
> However , 1 small issue with that  - 
> 
> let's say on seeing a particular variable , I want to find the most recent assignment to that (  store instruction )  variable , how will I be able to find the most recent ( since the allocas are pushed to the top of the IR ( and hence the most recent use may not be the actual one in my custom language ) 

This is nontrivial (if it were easy, we wouldn’t bother with SSA form), because it depends on the CFG.  There may not even be a single most recent store.  For example, consider the following code:

int x;
if (y == 0)
  x = 1;
else
  x = 2;
foo(x);

At the call to foo(x), what is the most recent store to x?  It depends on which path through the CFG was taken: it’s either x=1 or x=2.  If you perform SSA construction, then you will end up with a phi node[1] and an SSA register rather than stores to an alloca for x.

The real question is why do you want to avoid using the mechanisms that are explicitly designed to solve these problems?  Do they not work for something in your language?

David

[1] Actually, in this example, you’ll end up with a select instruction, but ignore that for now.