[llvm-dev] What is HexagonCommonGEP.cpp for?

[Krzysztof Parzyszek via llvm-dev]

On 6/14/2017 9:27 AM, Ryan Taylor wrote:
> 
>    Is this partly due to hardware loops not being common? I'm curious, 
> we do something very similar for similar reasons.

The original motivation was to avoid recomputation these parts of the 
address that were shared between different GEPs. Hexagon has a very 
large number of complex instructions, and these instructions could span 
various parts of the address calculation. This makes it prohibitively 
difficult to extract the common parts after instruction selection.

It also places the common GEPs as far out in the loop nest as possible 
(in the outermost region with respect to invariance). In addition to 
that, it will put a GEP before each load and store that is expected to 
be fully folded into an addressing mode of the load/store. As of now, it 
only does that for indexed modes (i.e. base reg + immediate offset), but 
Hexagon has a bunch more that could be exploited as well.

We don't do anything specifically related to hardware loops until much 
later in the codegen. What situations do you have in your target?

-Krzysztof

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