[llvm-dev] ISelDAGToDAG breaks node ordering

[Friedman, Eli via llvm-dev]

On 7/29/2017 1:28 AM, Dr. ERDI Gergo via llvm-dev wrote:
> Hi,
>
> During instruction selection, I have the following code for certain 
> LOAD instructions:
>
>       const LoadSDNode *LD = cast<LoadSDNode>(N);
>       SDNode* LDW = CurDAG->getMachineNode(AVR::LDWRdPtr, SDLoc(N), 
> VT, PtrVT, MVT::Other,
>           LD->getBasePtr(), LD->getChain());
>
>       // Honestly, I have no idea what this does, but other memory
>       // accessing instructions have something similar...
>       MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1);
>       MemOp[0] = cast<MemSDNode>(N)->getMemOperand();
>       cast<MachineSDNode>(LDW)->setMemRefs(MemOp, MemOp + 1);
>
>       // Reshuffle LDW's results so that the first two match LOAD's 
> result
>       // type
>       SDValue Unpack[] = { SDValue(LDW, 0), SDValue(LDW, 2), 
> SDValue(LDW, 1) };
>       SDNode* NN = CurDAG->getMergeValues(Unpack, SDLoc(N)).getNode();

Calling getMergeValues in ISelDAGToDAG is a bad idea; there aren't 
supposed to be any MERGE_VALUES nodes at that point in the pipeline.

You can call ReplaceUses with SDValues rather than SDNodes.

-Eli

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project