[llvm-dev] isSSA computation in MIR parser

Wed Jul 26 10:15:08 PDT 2017

As an example of what Matthias is suggesting, you can look at how we did that for the MachineCopyPropagation pass in https://reviews.llvm.org/D30751 (MachineCopyPropagation vs. MachineCopyPropagationPreRegRewrite).

> On Jul 26, 2017, at 10:05 AM, Matthias Braun via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> This should rather be solved by configuring your pass (i.e. use a common base class and create two passes from it), so you can clearly see the difference between pre- and post-ra based on the pass you are running. Determining the position in the pipeline based on flags in the machinefunction is a bad solution IMO.
> 
> - Matthias
> 
>> On Jul 26, 2017, at 4:50 AM, Verena Beckham via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>> 
>> Hi,
>> 
>> I noticed that a while ago the isSSA flag was removed from MIR, and this property is now computed. However, the deduction only checks the virtual registers (whether they are assigned to more than once). Now I have MIR tests which live after RA, so they only contain physical registers, so the parser determines they are in SSA form. These tests now fail because some of our passes can be called before and after SSA, so take the wrong branches.
>> Surely the isSSA computation is not comprehensive? It also doesn't take into account non-SSA tests which use virtual registers but happen to not assign twice to each.
>> Duplicate assignments imply not-SSA, but no duplicate (virtual reg) assignments doesn't imply SSA?
>> I noticed a Hexagon test (CodeGen/Hexagon/expand-condsets-rm-reg.mir) has a hack around this by inserting an additional COPY to a register, but that shouldn't be required. It means tests that are generated using llc might be failing because they are wrongly identified as SSA.
>> 
>> Thanks,
>> 
>> -- 
>> Verena Beckham
>> 
>> Senior Principal Software Engineer, Compilers
>> 
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