[llvm-dev] gcc's POINTER_PLUS_EXPR REG_POINTER
Mike Stump via llvm-dev
llvm-dev at lists.llvm.org
Fri Jul 21 11:39:27 PDT 2017
Do any existing ports in tree require the distinction of base and offset in say a memory load instruction where the base and offsets are the same width?
I was wondering what's the best way to support a load + base + displacement instruction where the pointer must be in the first position and offset in the second position. Scaled things are easier to tease apart due to the scaling of the offset, so, mainly just interested in byte address with byte displacements.
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