[llvm-dev] error: In anonymous_4820: Unrecognized node 'VRR128'!
hameeza ahmed via llvm-dev
llvm-dev at lists.llvm.org
Tue Jul 11 12:45:10 PDT 2017
Thank You so much.
On Tue, Jul 11, 2017 at 9:49 PM, Craig Topper <craig.topper at gmail.com>
wrote:
> Yes you can use the same register class for integer and fp. That
> instruction looks fine.
>
> ~Craig
>
> On Tue, Jul 11, 2017 at 9:14 AM, hameeza ahmed <hahmed2305 at gmail.com>
> wrote:
>
>> Thank You.
>> But can we use same register class for fadd as well,
>> is this instruction correct?
>>
>> def VFADD : I<0x0E, MRMDestReg, (outs VRR128:$dst), (ins VRR128:$src1,
>> VRR128:$src2),"VFADD\t{$src1, $src2, $dst|$dst, $src1, $src2}", [(set
>> VRR128:$dst, (fadd VRR128:$src1, VRR128:$src2))]>, TA;
>>
>> On Tue, Jul 11, 2017 at 9:00 PM, Craig Topper <craig.topper at gmail.com>
>> wrote:
>>
>>> "add" only works for integers. Floating point requires fadd. They are
>>> different operations in hardware too so you probably need different
>>> instructions.
>>>
>>> ~Craig
>>>
>>> On Tue, Jul 11, 2017 at 8:55 AM, hameeza ahmed <hahmed2305 at gmail.com>
>>> wrote:
>>>
>>>> Thank You.
>>>>
>>>> How to do the same for add please see the following; it gives
>>>> duplication error.
>>>>
>>>> def VADD : I<0x0E, MRMDestReg, (outs VRR128:$dst), (ins VRR128:$src1,
>>>> VRR128:$src2),"VADD\t{$src1, $src2, $dst|$dst, $src1, $src2}", [(set
>>>> VRR128:$dst, (add VRR128:$src1, VRR128:$src2))]>, TA;
>>>>
>>>> def : Pat<(add VRR128:$src1, VRR128:$src2), (VADD VRPIM128:$src1,
>>>> VRPIM128:$src2)>;
>>>> Where to place v32f32 to distinguish between the two?
>>>>
>>>> On Tue, Jul 11, 2017 at 7:55 PM, Craig Topper <craig.topper at gmail.com>
>>>> wrote:
>>>>
>>>>> You need a type inside this bitconvert. The outer type is the
>>>>> destination type for the bitconvert but it also needs an input type
>>>>>
>>>>> (store (v32i32 (bitconvert VRR128:$src)), addr:$dst)
>>>>>
>>>>> On Tue, Jul 11, 2017 at 7:27 AM hameeza ahmed <hahmed2305 at gmail.com>
>>>>> wrote:
>>>>>
>>>>>> hello,
>>>>>> i need to use v32i32 and v32f32 in store instructions.
>>>>>> I defined my register as;
>>>>>>
>>>>>> def VRR128 : RegisterClass<"X86", [v32i32, v32f32],
>>>>>> 1024, (add R_0_V_0, R_1_V_0, R_2_V_0)>;
>>>>>>
>>>>>> def STORE_DWORD : I<0x70, MRMDestMem, (outs), (ins i2048mem:$dst,
>>>>>> VRR128:$src),
>>>>>> "STORE_DWORD\t{$src, $dst|$dst, $src}",
>>>>>> [(store (v32i32 (bitconvert VRR128:$src)),
>>>>>> addr:$dst)], IIC_MOV_MEM>, TA;
>>>>>>
>>>>>>
>>>>>>
>>>>>> def: Pat<(store (v32f32 (bitconvert (VRR128:$src))), addr:$dst),
>>>>>> (STORE_DWORD addr:$dst, VRR128:$src)>;
>>>>>>
>>>>>> but getting the following error;
>>>>>> STORE_DWORD: (st (bitconvert:v32i32 VRR128:{v32i32:v32f32}:$src),
>>>>>> addr:iPTR:$dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>>
>>>>>> Included from /PIM/lib/Target/X86/X86.td:832:
>>>>>> /lib/Target/X86/X86InstrInfo.td:3166:1: error: In STORE_DWORD: Could
>>>>>> not infer all types in pattern!
>>>>>> def STORE_DWORD : I<0x70, MRMDestMem, (outs), (ins i2048mem:$dst,
>>>>>> VRR128:$src),
>>>>>> ^
>>>>>> anonymous_4820: /PIM/lib/Target/X86/X86.td:832:
>>>>>> /lib/Target/X86/X86InstrInfo.td:3173:1: error: In anonymous_4820:
>>>>>> Unrecognized node 'VRR128'!
>>>>>>
>>>>>> Please help.
>>>>>>
>>>>>> Thank You
>>>>>>
>>>>>> --
>>>>> ~Craig
>>>>>
>>>>
>>>>
>>>
>>
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170712/720215a1/attachment.html>
More information about the llvm-dev
mailing list