[llvm-dev] Pre/post-increment addressing mode in LSR

[Jamie Hanlon via llvm-dev]

Dear all,

From what I can gather, there is currently no way for loop strength reduction to target pre- and post-increment addressing modes. This is because the target hook `isLegalAddressingMode` in TargetTransformInfo.h doesn’t allow for pre- and post-increment. There is in fact a comment to that effect on the function prototype: “TODO: handle pre/postinc as well” (see http://llvm.org/docs/doxygen/html/TargetTransformInfo_8h_source.html line 310).

So I was wondering: is there a way to work around this limitation? And are there any plans to add support for pre- and post-increment addressing modes?

Thanks in advance for any help on this.

Jamie Hanlon (from Graphcore, www.graphcore.ai)
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