[llvm-dev] Error at Pre-regalloc Machine LICM: "getVRegDef assumes a single definition or no definition"' failed.

[Friedman, Eli via llvm-dev]

On 2/20/2017 7:15 PM, Alex Susu via llvm-dev wrote:
>   Hello.
>     Does anybody have an idea why I'm getting the error below when 
> using llc with arguments -O1 -disable-cgp? Note that this error is not 
> given when using llc -O0. (I'd like to mention also I'm using custom 
> Instruction selection for BUILD_VECTOR, which gets converted in my 
> back end's machine instrution VLOAD_D, although the custom code seems 
> to always select instructions in a valid way.)
>
>     ******** Pre-regalloc Machine LICM: Test ********
>     Entering BB#4
>     Hoist non-reg-pressure: %vreg50<def> = VLOAD_D 1; MSA128D:%vreg50 
> dbg:IfVectorize.c:37:16
>     Hoisting %vreg50<def> = VLOAD_D 1; MSA128D:%vreg50 
> dbg:IfVectorize.c:37:16
>      from BB#4 to BB#3
>     Hoist non-reg-pressure: %vreg51<def> = VLOAD_D 0; MSA128D:%vreg51
>     Hoisting %vreg51<def> = VLOAD_D 0; MSA128D:%vreg51
>      from BB#4 to BB#3
>     Can't remat / high reg-pressure: %vreg54<def> = COPY %vreg50; 
> BoolMask:%vreg54 MSA128D:%vreg50 dbg:IfVectorize.c:37:16
>     Can't remat / high reg-pressure: %vreg57<def> = COPY %vreg50; 
> BoolMask:%vreg57 MSA128D:%vreg50 dbg:IfVectorize.c:37:16
>     Entering BB#15
>     Hoisting %vreg66<def> = LD_imm64 4294967296; GPR:%vreg66
>      from BB#15 to BB#6
>     Entering BB#12
>     Hoist non-reg-pressure: %vreg83<def> = VLOAD_D 3; MSA128D:%vreg83 
> dbg:IfVectorize.c:42:13
>     Hoisting %vreg83<def> = VLOAD_D 3; MSA128D:%vreg83 
> dbg:IfVectorize.c:42:13
>      from BB#12 to BB#11
>     Hoist non-reg-pressure: %vreg84<def> = ORV_D %vreg83, %vreg83; 
> MSA128D:%vreg84,%vreg83,%vreg83 dbg:IfVectorize.c:42:18
>     Hoisting %vreg84<def> = ORV_D %vreg83, %vreg83; 
> MSA128D:%vreg84,%vreg83,%vreg83 dbg:IfVectorize.c:42:18
>      from BB#12 to BB#11
>     Hoist non-reg-pressure: %vreg86<def> = VLOAD_D 1; MSA128D:%vreg86 
> dbg:IfVectorize.c:42:13
>     Hoisting %vreg86<def> = VLOAD_D 1; MSA128D:%vreg86 
> dbg:IfVectorize.c:42:13
>      from BB#12 to BB#11
>     Hoist non-reg-pressure: %vreg87<def> = VLOAD_D 0; MSA128D:%vreg87 
> dbg:IfVectorize.c:42:18
>     Hoisting %vreg87<def> = VLOAD_D 0; MSA128D:%vreg87 
> dbg:IfVectorize.c:42:18
>      from BB#12 to BB#11
>     Hoist non-reg-pressure: %vreg85<def> = VLOAD_D 101; 
> MSA128D:%vreg85 dbg:IfVectorize.c:42:13
>     Hoisting %vreg85<def> = VLOAD_D 101; MSA128D:%vreg85 
> dbg:IfVectorize.c:42:13
>      from BB#12 to BB#11
>     Hoist non-reg-pressure: %vreg84<def> = ORV_D %vreg85, %vreg85; 
> MSA128D:%vreg84,%vreg85,%vreg85 dbg:IfVectorize.c:42:18
>     Hoisting %vreg84<def> = ORV_D %vreg85, %vreg85; 
> MSA128D:%vreg84,%vreg85,%vreg85 dbg:IfVectorize.c:42:18
>      from BB#12 to BB#11
>     Can't remat / high reg-pressure: %vreg94<def> = COPY %vreg86; 
> BoolMask:%vreg94 MSA128D:%vreg86 dbg:IfVectorize.c:42:13
>
>     llc: /llvm/lib/CodeGen/MachineRegisterInfo.cpp:339: 
> llvm::MachineInstr* llvm::MachineRegisterInfo::getVRegDef(unsigned 
> int) const: Assertion `(I.atEnd() || std::next(I) == def_instr_end()) 
> && "getVRegDef assumes a single definition or no definition"' failed.

The immediate explanation of what this means if pretty easy: virtual 
registers are SSA (like values in LLVM IR), so every virtual register 
should have exactly one definition.

You might want to try the "-verify-machineinstrs" flag to llc to get 
better error messages for mistakes like this.

-Eli

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