[llvm-dev] Canonical way to handle zero registers?

[Matt Arsenault via llvm-dev]

> On Dec 29, 2017, at 11:34, Krzysztof Parzyszek via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> You can construct an instruction that has an immediate operand in place of a register, but that won't work well.  For one, the MachineVerifier will complain about having an invalid operand, plus any code that tries to use operand information for that instruction may end up "surprised" to see an immediate where a register was expected.
You could do this, but you would have to define a custom operand type with custom verification for the allowed operand types. This is how AMDGPU handles most operands which can be registers or specific immediates

-Matt
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