[llvm-dev] Passes to add/validate synthetic debug info

[Vedant Kumar via llvm-dev]

Hi,

I've prototyped a pair of passes which 1) add synthetic debug info to a Module and 2) determine how much of that info is lost. The idea is to make it easier to write targeted test cases for debug info preservation. For example, here is a quick way to test that Mem2Reg doesn't drop debug info from one test input:

> ; RUN: opt < %s -debugify -mem2reg -check-debugify -S 2>&1 | FileCheck %s
> ; CHECK: CheckDebugify: PASS

So far, I've used this utility to identify problems in LSR and instcombine (haven't gotten around to filing bugs yet). There's some more discussion about this utility on the thread "RFC: [GlobalISel] Towards a generic MI combiner framework", where Amara and Daniel suggested trying something similar at the MI level.

I've put the passes up for review here https://reviews.llvm.org/D40512 <https://reviews.llvm.org/D40512>. I just wanted to ping llvm-dev to raise awareness about the proposed passes, and to see if anyone in the community has concerns/feedback.

thanks,
vedant
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