[llvm-dev] question: access IR class Instruction from DAG SDValue

[Jatin Bhateja via llvm-dev]

Just go through DILocation (a specialized meta data created for dwarf) flow
through IR->SDNode->MI.
MDNode is fundamental unit which is encapsulated into MDNodeSDNode in DAG
and MachineOperand kind = MO_metadata in MI phases.

Thanks

On Sat, Dec 2, 2017 at 5:17 PM, 陳韋任 via llvm-dev <llvm-dev at lists.llvm.org>
wrote:

> I'd recommend you writing RFC to the list to explain the motivation and
> how you want to do, so that others in interested might have a look.
>
> 2017-11-29 8:21 GMT-05:00 Jonathan via llvm-dev <llvm-dev at lists.llvm.org>:
>
>> Seems llvm cannot pass metadata to MachineInstr, or setting operand
>> description in class Instruction and pass to class MachineInstr.
>> Is it a good idea to extend llvm kernel structure to having this feature?
>>
>> Jonathan
>>
>>
>> On Nov 27, 2017, at 9:01 PM, Jatin Bhateja <jatin.bhateja at gmail.com>
>> wrote:
>>
>> SelectionDAGBuilder contained within SelectionDAGISel has a map (NodeMap)
>> b/w Value (Instruction) and corrosponding dag value (SDValue).
>>
>> Isn't that usable for your purpose.
>>
>> Thanks,
>> Jatin
>>
>> On 27 Nov 2017 18:21, "Jonathan via llvm-dev" <llvm-dev at lists.llvm.org>
>> wrote:
>>
>>> I am working on llvm gpu backend. The instruction metadata can only get
>>> in IR (class instruction). In DAG stage, the instructions are reordered, so
>>> I cannot map the metadata to correct instruction if I cannot access
>>> instruction from DAG or MachineInstr structure.
>>>
>>>
>>> On Nov 26, 2017, at 11:02 PM, Ryan Taylor <ryta1203 at gmail.com> wrote:
>>>
>>> It might be a more useful to know what it is you need from the IR in the
>>> DAG or what it is you r trying to do?
>>>
>>>
>>>
>>> On Nov 25, 2017 7:59 PM, "Jonathan via llvm-dev" <
>>> llvm-dev at lists.llvm.org> wrote:
>>>
>>>> The llvm backend uses class Instruction in IR handle stage, create
>>>> SDVaule and DAG in DAG translation stage and class MachineInstr in Machine
>>>> instruction translation stage.
>>>> Can I access class Instruction from DAG structure or stage, or access
>>>> DAG and Instruction from MachineInstr structure or stage?
>>>>
>>>> Jonathan
>>>> _______________________________________________
>>>> LLVM Developers mailing list
>>>> llvm-dev at lists.llvm.org
>>>> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>>>>
>>>
>>>
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>>>
>>
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>>
>
>
> --
> Wei-Ren Chen (陳韋任)
> Homepage: https://people.cs.nctu.edu.tw/~chenwj
>
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