[llvm-dev] RFC/bikeshedding: Separation of instruction and pattern definitions in LLVM backends

[ORiordan, Martin via llvm-dev]

If no pattern is provided, does the implied 'hasSideEffects' take preference over an explicit 'let hasSideEffects = 0'?

I assume not, but I'd like to be certain.

Knowing about this default for a NULL pattern is important though, I was certainly unaware of this until this discussion and will have to revisit my existing definitions which have NULL patterns in case 'hasSideEffects' doesn't have the value I would expect for the instruction.

Thanks,

    MartinO

-----Original Message-----
From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Alex Bradbury via llvm-dev
Sent: Monday, August 21, 2017 3:32 PM
To: Daniel Sanders <daniel_l_sanders at apple.com>
Cc: llvm-dev <llvm-dev at lists.llvm.org>; John Leidel <john.leidel at gmail.com>
Subject: Re: [llvm-dev] RFC/bikeshedding: Separation of instruction and pattern definitions in LLVM backends

On 21 August 2017 at 11:53, Daniel Sanders <daniel_l_sanders at apple.com> wrote:
> One thing to be aware of with this is that (IIRC) tablegen uses the pattern to infer things about the pattern. One example I vaguely remember is that an empty pattern would result in the same effect as hasSideEffects=1 and I think there were others.

Thanks for the note - excellent point. Looking at CodeGenDAGPatterns.cpp, it seems in the absence of a pattern hasSideEffects will be 1, while mayLoad and mayStore default to 0.
Back in 2012, Jakob Stoklund Olesen added the guessInstructionProperties flag, which causes an error <https://reviews.llvm.org/rL162460> if a property isn't set explicitly and can't be inferred. It doesn't look like any other in-tree targets have ended up enabling this, but it looks like it would be worth enabling for RISCV, particularly if going ahead with splitting instructions and patterns.

Best,

Alex
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