[llvm-dev] Vectorization in LLVM x86 backend

[Charith Mendis via llvm-dev]

I isolated the LLVM IR and the X86 instructions emitted for the function
and are attached herewith and it is clearly emitting vector instructions. I
am having a hard time figuring out where the vector instructions are
formulated. For sure SLP and Loop vectorizer is not doing anything.

On Mon, Aug 21, 2017 at 11:56 AM, Craig Topper <craig.topper at gmail.com>
wrote:

> The X86 backend shouldn't be doing any additional vectorization. If there
> are no vector types in IR, I don't think the X86 backend will create any.
>
> ~Craig
>
> On Mon, Aug 21, 2017 at 8:49 AM, Charith Mendis via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>>
>> Hi all,
>>
>> Recently I compiled the attached .c file using Clang with "-mavx2 -mfma
>> -m32 -O3" optimization flags.
>>
>> First I used -emit-llvm and inspected the LLVM IR and there are no vector
>> instructions. Then I got the assembly output of the file in it I can
>> clearly see vector instructions in it.
>>
>> Neither the SLPVectorizer or the LoopVectorizer is however doing any
>> vectorization (also checked it using -debug-only flag) as witnessed by the
>> LLVM IR dump.
>>
>> Therefore, the vectorization should happen in the backend(?).
>>
>> Can I know whether the x86 backend does additional vectorization of
>> scalar code and if so in which passes?
>>
>> NB - I posed the same question with the source files in a previous email,
>> but the limit of 100kB was reached.
>>
>> Thank You.
>> --
>> Kind regards,
>> Charith Mendis
>>
>> Graduate Student,
>> CSAIL,
>> Massachusetts Institute of Technology
>>
>> _______________________________________________
>> LLVM Developers mailing list
>> llvm-dev at lists.llvm.org
>> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>>
>>
>


-- 
Kind regards,
Charith Mendis

Graduate Student,
CSAIL,
Massachusetts Institute of Technology
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